JPH0131822B2 - - Google Patents

Info

Publication number
JPH0131822B2
JPH0131822B2 JP57207428A JP20742882A JPH0131822B2 JP H0131822 B2 JPH0131822 B2 JP H0131822B2 JP 57207428 A JP57207428 A JP 57207428A JP 20742882 A JP20742882 A JP 20742882A JP H0131822 B2 JPH0131822 B2 JP H0131822B2
Authority
JP
Japan
Prior art keywords
phase
signal
output
outputs
adder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57207428A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58154960A (ja
Inventor
Yasutsune Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP57207428A priority Critical patent/JPS58154960A/ja
Publication of JPS58154960A publication Critical patent/JPS58154960A/ja
Publication of JPH0131822B2 publication Critical patent/JPH0131822B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2271—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
    • H04L27/2273—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals associated with quadrature demodulation, e.g. Costas loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
JP57207428A 1982-11-26 1982-11-26 位相同期回路 Granted JPS58154960A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57207428A JPS58154960A (ja) 1982-11-26 1982-11-26 位相同期回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57207428A JPS58154960A (ja) 1982-11-26 1982-11-26 位相同期回路

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP3974276A Division JPS52138856A (en) 1975-12-02 1976-04-08 Phase synchronous circuit

Publications (2)

Publication Number Publication Date
JPS58154960A JPS58154960A (ja) 1983-09-14
JPH0131822B2 true JPH0131822B2 (en]) 1989-06-28

Family

ID=16539588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57207428A Granted JPS58154960A (ja) 1982-11-26 1982-11-26 位相同期回路

Country Status (1)

Country Link
JP (1) JPS58154960A (en])

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03123022U (en]) * 1990-03-29 1991-12-16
JPH03123023U (en]) * 1990-03-29 1991-12-16

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03123022U (en]) * 1990-03-29 1991-12-16
JPH03123023U (en]) * 1990-03-29 1991-12-16

Also Published As

Publication number Publication date
JPS58154960A (ja) 1983-09-14

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